The MIT’s CSAIL researchers have recently developed a cache system for creating new cache structures on the spot in order to optimize for a specific application. This cache system that is known as Jenga has the ability to know the location of each memory bank, knows how to calculate store data for reducing the travel time even if it requires changing the hierarchy. This system would be ready if an app wants to benefit from multiple cache levels or one gigantic cache.
According to reports, just by adopting Jenga, the gains can be huge as a simulated score ran up 30 percent faster from a 36-core chip by using up to 85% less power. With this system, the users will not have to face any penalty for having many cores on a chip.
But the issue is that Jenga is just stimulation and it will take the time to develop and get real world examples from this system. It is still a long way to go before chip manufacturers finally adopt it if they liked the idea of it. This is a concept which can be expected to be followed by CPU giants such as Intel and Qualcomm. Performance is always boosted by the chip makers by shifting to ever-smaller manufacturing processes. With a bit of an effort, the latest cache system can bring out extra performance out of the chips.